Creating devices quickly using field programmable logic arrays
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Designers are now using programmable arrays to translate circuits into consumer chips
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— By special arrangement
CUTTING COST: Structured ASICs combine pre-tested base layers of logic with custom-designed circuits.
THE BANGALORE-BASED Ittiam Systems was recently judged by the independent market analyst Forward Concepts, to be the world's `most preferred supplier' of intellectual property in the digital signal processing business — a ranking it has achieved for three years running.
It is a company, which has turned out a host of devices in the consumer electronics space — digital multimedia players, Internet videophones and most recently an engine to drive high definition television appliances.
To realise these designs in the shortest possible time, Ittiam engineers use programmable logic devices or PLDs to create and test their products.
Complex subsystems
In particular, many of the complex subsystems are created using a particularly popular type of PLD — the Field Programmable Logic Array or FPGA.
This allows Ittiam to try out various architectures at the same time and to test the application on platforms, which are slightly larger than what the end product in the customer might be — but are many orders of magnitude cheaper to realise. How is this?
Ittiam's CEO Srini Rajam explains: "This is a volume game. To realise one of our designs as a final piece of silicon — what is called an Application Specific Integrated Circuit or ASIC, it would cost between $ 1 and 2 million — and at least 6 months additional development time.
70 per cent share
"FPGAs give us the means to create the device quickly and to offer it to our manufacturing customers in a form that could go into the end product. In fact about quite a few of our creations run as FPGAs in the hands of the consumer.
"About half of them are converted into ASICs once a sufficiently large market has been established."The HD TV application was realised using a family of FPGAs from Altera Corporation, which with Xilinx, enjoys about 70 per cent share of the global FPGA market.
The biggest savings in creating applications with FPGAs rather than as ASICs is the absence of the huge non-recoverable engineering costs, as well as expenses on tools, package design, board redesign and fabrication cycle time.
"The total development cost of an ASIC chip with about 20 million gates in 65 nanometres could hit $ 20 million.
Move to 45 nm and this could double," says Razak Mohammed Ali, Asia Pacific Product Manager for Altera.
He adds: "Almost 65 percent of the designs will fail the first time. Some 40 per cent will need three re-workings.
First company
In 2002 Altera became the first FPGA company to come to India, followed by Xilinx, now the largest player on this turf.
Since then, Indian `fabless' chip and device designers have embraced the FPGA route to be first off the starting gates with a plethora of compelling products.
Altera offers a product that allows the designer to take the FPGA breadboard a step closer to the ASIC: Hard Copy is a tool that allows the FPGA to be customised for one customer and produced in prototype quantities.
A million gates
It can also be used to `freeze' the design on a System on a Chip or SOC. Leaders in silicon `core' IP like the UK based ARM, offer designers, an SOC design kit in a suitcase — complete with a million programmable Altera gates and dozens of Xilinx FPGA emulators.
Most FPGA players offer similar tools where designs can be migrated seamlessly into what is known as a Structured ASIC .
This is an ASIC where basic pre-tested layers of logic and hard Intellectual Property can be combined with customised layers of proprietary design. An FPGA engineer likened this to a pizza — where the base is common but you can order a choice of toppings to go with it.
Clever software
It is a nice analogy in ways the engineer may not have intended, because programmable devices like FPGAs, together with the clever software offered by companies like Altera and Xilinx, Lattice Semiconductor and Actel, allow India's growing community of world class, cutting-edge digital device designers to have their cake (or pizza) and eat it too.
They are thus able to enjoy the advantages of `earliest to market' and customer confidence-inducing prototypes without the numbing costs of traditional ASIC design.
ANAND PARTHASARATHY
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